Closed Noxygen closed 3 years ago
What's wrong with li {r: reg}, {value: s20} => value @ r'5 @ 0b0000010
?
That's giving me the entire instruction in the wrong order.
So bit 31 is the least significant bit and bit 0 is the most significant?
Ok, it's getting pretty late here and tomorrow I'm probably about to conclude that I'm a frickin' idiot in need of vacation... I'll let you know.
I simply want them to be ordered command-first the way they are defined in the figure above. RISC-V uses the same order so it can't be that unusual.
Now I'm really confused.
If your instruction is li x0, 0x1234
, would the expected output be 0x01234002
, 0x4002C480
or something different?
(Assuming of course that x0 => 0b00000
)
outp | addr | data
0:0 | 0 | 11111111 11111111 11100001 10000010 ; li r3, -2
(using negative nr to make it more visible) I simply need these bits to be in the exact opposite order. Exactly the way it is in RISC-V and ARM if I remember correctly.
I don't know about ARM, but RISC-V doesn't invert the bit order. From https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md:
00000000 <.text>:
0: deadc537 lui a0,0xdeadc
4: eef50513 addi a0,a0,-273 # deadbeef <CONSTANT+0x0>
Notice how the output of lui a0,0xdeadc
is 0xdeadc537
, so the bits are not inverted.
You can use this website to check that lui x3, -2
gets assembled into 0xffffe1b7 = 11111111 11111111 11100001 10110111
, which is exactly like the output you got (except for the opcode).
Now, some processors do exist that invert bitorder, Microblaze comes to mind. So there's still use to a directive or way to reverse the order of bits in a field.
Jeez, yes you're absolutely right.. Somehow that concatenation with "@" totally hacked my brain into treading everything like a string instead of actual bits... Sorry for bothering you. But maybe it would still make a nice feature. Kind of a "reverse slicing" notation like value[0:19].
Keep up the nice work!
No problem, glad to have helped. I agree that some way of reversing bits might be useful.
Given the following instruction definition:
One attempt of creating a rule for it was the following line:
li {r: reg}, {value: s20} => 0b01 @ 0b00000 @ r'5 @ value[19:0]
However this of course gives me the register and immediate value in the wrong bit order. Should Customasm get some sort of bit-reversion ability or am I just taking the wrong approach here?