hlorenzi / customasm

💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/
Apache License 2.0
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Option for bit order reversing? #78

Closed Noxygen closed 3 years ago

Noxygen commented 3 years ago

Given the following instruction definition:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
---------------- simm[19:0] ------------------------------  ---- rd --- 0 0 0 0 0 1 0

One attempt of creating a rule for it was the following line: li {r: reg}, {value: s20} => 0b01 @ 0b00000 @ r'5 @ value[19:0]

However this of course gives me the register and immediate value in the wrong bit order. Should Customasm get some sort of bit-reversion ability or am I just taking the wrong approach here?

pol-rivero commented 3 years ago

What's wrong with li {r: reg}, {value: s20} => value @ r'5 @ 0b0000010?

Noxygen commented 3 years ago

That's giving me the entire instruction in the wrong order.

pol-rivero commented 3 years ago

So bit 31 is the least significant bit and bit 0 is the most significant?

Noxygen commented 3 years ago

Ok, it's getting pretty late here and tomorrow I'm probably about to conclude that I'm a frickin' idiot in need of vacation... I'll let you know.

Noxygen commented 3 years ago

I simply want them to be ordered command-first the way they are defined in the figure above. RISC-V uses the same order so it can't be that unusual.

pol-rivero commented 3 years ago

Now I'm really confused. If your instruction is li x0, 0x1234, would the expected output be 0x01234002, 0x4002C480 or something different? (Assuming of course that x0 => 0b00000)

Noxygen commented 3 years ago
 outp | addr | data
  0:0 |    0 | 11111111 11111111 11100001 10000010 ; li r3, -2

(using negative nr to make it more visible) I simply need these bits to be in the exact opposite order. Exactly the way it is in RISC-V and ARM if I remember correctly.

pol-rivero commented 3 years ago

I don't know about ARM, but RISC-V doesn't invert the bit order. From https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md:

00000000 <.text>:
   0:   deadc537            lui a0,0xdeadc
   4:   eef50513            addi    a0,a0,-273 # deadbeef <CONSTANT+0x0>

Notice how the output of lui a0,0xdeadc is 0xdeadc537, so the bits are not inverted. You can use this website to check that lui x3, -2 gets assembled into 0xffffe1b7 = 11111111 11111111 11100001 10110111, which is exactly like the output you got (except for the opcode).

moonheart08 commented 3 years ago

Now, some processors do exist that invert bitorder, Microblaze comes to mind. So there's still use to a directive or way to reverse the order of bits in a field.

Noxygen commented 3 years ago

Jeez, yes you're absolutely right.. Somehow that concatenation with "@" totally hacked my brain into treading everything like a string instead of actual bits... Sorry for bothering you. But maybe it would still make a nice feature. Kind of a "reverse slicing" notation like value[0:19].

Keep up the nice work!

pol-rivero commented 3 years ago

No problem, glad to have helped. I agree that some way of reversing bits might be useful.