Question about iCE40 BGA Land Pattern

[Cushychicken]

Howdy! This isn't an issue per se - I was hoping you could talk a little bit about the footprint you used for the iCE40 part in your design.

The main things I noticed:

• You've staggered the pad diameter between pads on the underside. Best as I can tell it's alternating 0.23mm and 0.2mm diameter pads.
• You're using NSMD (non soldermask defined) pads. We're using 0.25mm pads with no change in mask diameter, so effectively SMD (soldermask defined) pads.

I'm experiencing some issues on a board with the same iCE40 part - out of my initial run of 10 boards, only 1 FPGA actually worked. 😆 I've run myself ragged testing the power, reset, clock sequence, and I'm convinced that's correct. I'm also able to program the device on board, just not run any RTL. My suspicion is that the inner balls of the BGA are not making good pad contact with the board.

Wondering if your land pattern is in response to some manufacturability issues with FOMU - any context you have to offer would be greatly appreciated. Thanks a zillion!

[xobs]

The difference in diameter size was due to using via-in-pad, which necessitated making some pads bigger. I made the pads symmetrical in order to prevent the part from rotating during reflow -- the theory being it's pulled equally in all directions.

I was asked by my PCB vendor to increase those pads specifically, and we had very few manufacturability issues once we solved the hard gold issue. You're welcome to use the footprint in your projects!

[Cushychicken]

I may give that footprint a shot - thanks for the recommendation.

Do you have a link to the hard gold issue you mentioned? I'd like to read up on what you were struggling with there, and see if it has anything in common with our issues.

[xobs]

It was a problem during actual PCB manufacture. There was an update about this at https://www.crowdsupply.com/sutajio-kosagi/fomu/updates/fomu-production-delay

[Cushychicken]

I'll read up. Thanks for your help.