Closed anmyachev closed 2 weeks ago
@whitneywhtsang I am ending this and stopping this activity for now as agreed with you offline :)
@whitneywhtsang ready for review
Is the pass rate degradation solely due to test_scaled_dot? Can we open an issue to fix that?
Is the pass rate degradation solely due to test_scaled_dot? Can we open an issue to fix that?
Yes, simply because the number of parameter combinations has increased, before this PR this test also did not work on XPU. Will open.
Is the pass rate degradation solely due to test_scaled_dot? Can we open an issue to fix that?
Yes, simply because the number of parameter combinations has increased, before this PR this test also did not work on XPU. Will open.
Looks like to the number of test cases are unchanged, but this PR marks the failures as skipped instead of xfailed, that's why pass rate is affected.
Is the pass rate degradation solely due to test_scaled_dot? Can we open an issue to fix that?
Yes, simply because the number of parameter combinations has increased, before this PR this test also did not work on XPU. Will open.
Looks like to the number of test cases are unchanged, but this PR marks the failures as skipped instead of xfailed, that's why pass rate is affected.
Ah, it increased only for AMD, I see.
This PR change the Triton base from https://github.com/intel/intel-xpu-backend-for-triton/commit/1d5fdfe9772cac77d675ea7798145fe467e63526 to https://github.com/intel/intel-xpu-backend-for-triton/commit/86a2ac753befe5286a261ba3b64eb40bdcca5704 (Oct 28). Pass rate: 99.83%->97.41%
Please do not squash and merge this PR.