I am trying to implement the IPbus protocol through the onboard PHY via SGMII but with no success. What I have been doing is to change the IPs settings and their connections inside the eth_us component by taking into consideration the xilinx documentation of these IPs. Do you have any further suggestions?
I am trying to implement the IPbus protocol through the onboard PHY via SGMII but with no success. What I have been doing is to change the IPs settings and their connections inside the eth_us component by taking into consideration the xilinx documentation of these IPs. Do you have any further suggestions?
Regards Kosmas