Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
Coverage remained the same at 32.448% when pulling cee7180bb54cc71bc0414247b9b38ad24c62cdb6 on scriptfix into a7f894160692ca6110555f1e6dbdb8657a727309 on master.
Coverage remained the same at 32.448% when pulling cee7180bb54cc71bc0414247b9b38ad24c62cdb6 on scriptfix into a7f894160692ca6110555f1e6dbdb8657a727309 on master.