Mid Level IR - Githubissues

jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.

MIT License

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Mid Level IR #79

Open jameshegarty opened 7 years ago

jameshegarty commented 7 years ago

A slightly higher level IR than Rigel. The delta vs existing IR would be:

Automatic FIFO allocation
Automatic Handshake annotation (no lifting needs to be specified - only base types need to match)
Cleaner casting behavior? Arrays of size 1 can cast to scalars.