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jameshegarty / rigel

Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FPGAs, and also can compile to fast x86 test code using Terra.
MIT License
56 stars 9 forks source link

Scriptcleanup #94

Closed jameshegarty closed 6 years ago

coveralls commented 6 years ago

Coverage Status

Coverage increased (+0.006%) to 66.223% when pulling 2d6cfc3c8f0e6e8ef42d4a1f47f308894905d394 on scriptcleanup into f72b37aa43b592bcb50ccf6590bf4fe9de4984f6 on master.

coveralls commented 6 years ago

Coverage Status

Coverage increased (+0.006%) to 66.223% when pulling 2d6cfc3c8f0e6e8ef42d4a1f47f308894905d394 on scriptcleanup into f72b37aa43b592bcb50ccf6590bf4fe9de4984f6 on master.