search

jeanthom / gram

DDR3 controller for nMigen (WIP)
Other
14 stars 1 forks source link

Long critical path between refresher and somewhere in controller #24

Closed jeanthom closed 4 years ago

jeanthom commented 4 years ago 
Info: Critical path report for clock '$glbnet$sysclk_clk' (posedge -> posedge):
Info: curr total
Info:  0.3  0.3  Source dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_SD_LUT4_Z_6_SLICE.Q1
Info:  0.8  1.1    Net dramcore.controller.refresher.zqcs_timer.count[24] budget 0.266000 ns (28,84) -> (28,84)
Info:                Sink dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_SD_LUT4_Z_6_SLICE.B0
Info:  0.1  1.2  Source dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_SD_LUT4_Z_6_SLICE.F0
Info:  0.8  2.0    Net dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_SD[0] budget 0.266000 ns (28,84) -> (25,84)
Info:                Sink dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.A1
Info:  0.2  2.2  Source dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX0
Info:  0.0  2.2    Net dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 budget 0.000000 ns (25,84) -> (25,84)
Info:                Sink dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.FXB
Info:  0.1  2.4  Source dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX1
Info:  0.0  2.4    Net dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1 budget 0.000000 ns (25,84) -> (25,84)
Info:                Sink dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.FXB
Info:  0.1  2.5  Source dramcore.controller.refresher.sequencer.count_LUT4_C_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.OFX1
Info:  1.0  3.5    Net dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z_LUT4_Z_2_C_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_C_Z_PFUMX_ALUT_C0_LUT4_Z_D_LUT4_C_A_LUT4_Z_D[0] budget 0.266000 ns (25,84) -> (16,79)
Info:                Sink dramcore.controller.U$$6.trccon.ready_LUT4_D_Z_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1_D_L6MUX21_SD_D1_PFUMX_Z_SLICE.D0
Info:  0.2  3.7  Source dramcore.controller.U$$6.trccon.ready_LUT4_D_Z_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1_D_L6MUX21_SD_D1_PFUMX_Z_SLICE.OFX0
Info:  0.0  3.7    Net dramcore.controller.U$$6.trccon.ready_LUT4_D_Z_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1_D_L6MUX21_SD_D1 budget 0.000000 ns (16,79) -> (16,79)
Info:                Sink dramcore.controller.U$$6.trccon.ready_LUT4_D_Z_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1_D_L6MUX21_SD_D1_PFUMX_Z_SLICE.FXB
Info:  0.1  3.8  Source dramcore.controller.U$$6.trccon.ready_LUT4_D_Z_LUT4_Z_C_LUT4_B_Z_LUT4_Z_1_D_L6MUX21_SD_D1_PFUMX_Z_SLICE.OFX1
Info:  0.8  4.7    Net dramcore.controller.U$$6.trascon.ready_LUT4_D_Z[3] budget 0.266000 ns (16,79) -> (16,78)
Info:                Sink dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_1_Z_PFUMX_ALUT_SLICE.C1
Info:  0.2  4.9  Source dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_1_Z_PFUMX_ALUT_SLICE.OFX0
Info:  0.0  4.9    Net dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_1_Z_PFUMX_ALUT_Z budget 0.000000 ns (16,78) -> (16,78)
Info:                Sink dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_1_Z_PFUMX_ALUT_SLICE.FXB
Info:  0.1  5.1  Source dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_1_Z_PFUMX_ALUT_SLICE.OFX1
Info:  0.0  5.1    Net dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_1_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z budget 0.000000 ns (16,78) -> (16,78)
Info:                Sink dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_Z_PFUMX_ALUT_SLICE.FXA
Info:  0.1  5.2  Source dramcore.controller.U$$6.U$$1.source__payload__we_LUT4_B_Z_PFUMX_ALUT_SLICE.OFX1
Info:  0.9  6.1    Net dramcore.controller.U$$0.U$$1.source__payload__we_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] budget 0.354000 ns (16,78) -> (17,80)
Info:                Sink dramcore.controller.multiplexer.tccdcon.ready_LUT4_D_Z_LUT4_Z_3_SLICE.C0
Info:  0.1  6.2  Source dramcore.controller.multiplexer.tccdcon.ready_LUT4_D_Z_LUT4_Z_3_SLICE.F0
Info:  1.0  7.2    Net dramcore.controller.multiplexer.tccdcon.ready_LUT4_D_Z[1] budget 0.354000 ns (17,80) -> (20,80)
Info:                Sink dramcore.controller.U$$2.U$$0.fifo.r_rdy_LUT4_D_1_Z_PFUMX_ALUT_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.B1
Info:  0.2  7.4  Source dramcore.controller.U$$2.U$$0.fifo.r_rdy_LUT4_D_1_Z_PFUMX_ALUT_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX0
Info:  0.0  7.4    Net dramcore.controller.U$$2.U$$0.fifo.r_rdy_LUT4_D_1_Z_PFUMX_ALUT_Z_L6MUX21_Z_D1 budget 0.000000 ns (20,80) -> (20,80)
Info:                Sink dramcore.controller.U$$2.U$$0.fifo.r_rdy_LUT4_D_1_Z_PFUMX_ALUT_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.FXB
Info:  0.1  7.6  Source dramcore.controller.U$$2.U$$0.fifo.r_rdy_LUT4_D_1_Z_PFUMX_ALUT_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX1
Info:  1.7  9.3    Net dramcore.controller.U$$2.trccon.ready_LUT4_D_Z[4] budget 1.867000 ns (20,80) -> (25,65)
Info:                Sink dramcore.controller.U$$2.U$$0.fifo.r_en_LUT4_Z_SLICE.D0
Info:  0.1  9.4  Source dramcore.controller.U$$2.U$$0.fifo.r_en_LUT4_Z_SLICE.F0
Info:  1.1 10.5    Net dramcore.controller.U$$2.U$$0_source__ready budget 1.866000 ns (25,65) -> (23,61)
Info:                Sink dramcore.controller.U$$2.U$$0.fifo.storage.2.0.0$DPRAM1_SLICE.CE
Info:  0.0 10.5  Setup dramcore.controller.U$$2.U$$0.fifo.storage.2.0.0$DPRAM1_SLICE.CE
Info: 2.5 ns logic, 8.0 ns routing
jeanthom commented 4 years ago

With the last two commits we got it to an acceptable level where the design would accept to compile at 100 Mhz. The current critical path is:

Info: Critical path report for clock '$glbnet$sysclk_clk' (posedge -> posedge):
Info: curr total
Info:  0.3  0.3  Source dramcore.controller.U$$5.U$$0.fifo.storage.2.0.0$DPRAM0_SLICE.Q0
Info:  0.9  1.2    Net dramcore.controller.U$$5.U$$1_source__payload__addr[7] budget 0.315000 ns (22,68) -> (25,68)
Info:                Sink dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_SD_L6MUX21_Z_5_D1_PFUMX_Z_SLICE.C1
Info:  0.2  1.4  Source dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_SD_L6MUX21_Z_5_D1_PFUMX_Z_SLICE.OFX0
Info:  0.0  1.4    Net dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_SD_L6MUX21_Z_5_D1 budget 0.000000 ns (25,68) -> (25,68)
Info:                Sink dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_SD_L6MUX21_Z_5_D1_PFUMX_Z_SLICE.FXB
Info:  0.1  1.6  Source dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_SD_L6MUX21_Z_5_D1_PFUMX_Z_SLICE.OFX1
Info:  0.7  2.3    Net dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_SD[0] budget 0.314000 ns (25,68) -> (24,67)
Info:                Sink dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.B1
Info:  0.2  2.5  Source dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX0
Info:  0.0  2.5    Net dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 budget 0.000000 ns (24,67) -> (24,67)
Info:                Sink dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.FXB
Info:  0.1  2.7  Source dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX1
Info:  0.0  2.7    Net dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1 budget 0.000000 ns (24,67) -> (24,67)
Info:                Sink dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.FXB
Info:  0.1  2.8  Source dramcore.controller.U$$5.row_opened_LUT4_D_1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.OFX1
Info:  1.2  4.0    Net dramcore.controller.U$$5.row_opened_LUT4_D_1_Z[2] budget 0.452000 ns (24,67) -> (24,83)
Info:                Sink dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z_LUT4_Z_4_C_PFUMX_Z_1_SLICE.D1
Info:  0.2  4.2  Source dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z_LUT4_Z_4_C_PFUMX_Z_1_SLICE.OFX0
Info:  0.6  4.8    Net dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z_LUT4_Z_4_C[0] budget 0.452000 ns (24,83) -> (21,83)
Info:                Sink dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z_LUT4_Z_4_SLICE.C1
Info:  0.1  5.0  Source dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z_LUT4_Z_4_SLICE.F1
Info:  0.9  5.9    Net dramcore.controller.multiplexer.trrdcon.ready_LUT4_C_Z[1] budget 0.452000 ns (21,83) -> (26,80)
Info:                Sink dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.D1
Info:  0.2  6.1  Source dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.OFX0
Info:  0.0  6.1    Net dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 budget 0.000000 ns (26,80) -> (26,80)
Info:                Sink dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.FXA
Info:  0.1  6.3  Source dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX1
Info:  0.0  6.3    Net dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1 budget 0.000000 ns (26,80) -> (26,80)
Info:                Sink dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.FXB
Info:  0.1  6.4  Source dramcore.controller.U$$6.trascon.ready_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_SLICE.OFX1
Info:  1.4  7.8    Net dramcore.controller.multiplexer.tfawcon.valid_LUT4_Z_C[1] budget 1.230000 ns (26,80) -> (29,78)
Info:                Sink dramcore.controller.U$$3.trascon.ready_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.C1
Info:  0.2  8.1  Source dramcore.controller.U$$3.trascon.ready_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX0
Info:  0.0  8.1    Net dramcore.controller.U$$3.trascon.ready_LUT4_C_Z_L6MUX21_Z_D1 budget 0.000000 ns (29,78) -> (29,78)
Info:                Sink dramcore.controller.U$$3.trascon.ready_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.FXB
Info:  0.1  8.2  Source dramcore.controller.U$$3.trascon.ready_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_SLICE.OFX1
Info:  0.7  9.0    Net dramcore.controller.U$$3.trascon.ready_LUT4_C_Z[1] budget 1.230000 ns (29,78) -> (29,80)
Info:                Sink dramcore.controller.U$$3.fsm_state_TRELLIS_FF_Q_DI_PFUMX_Z_SLICE.D1
Info:  0.2  9.2  Source dramcore.controller.U$$3.fsm_state_TRELLIS_FF_Q_DI_PFUMX_Z_SLICE.OFX0
Info:  0.1  9.3    Net dramcore.controller.U$$3.fsm_state_TRELLIS_FF_Q_DI[1] budget 0.878000 ns (29,80) -> (29,80)
Info:                Sink dramcore.controller.U$$3.fsm_state_TRELLIS_FF_Q_DI_PFUMX_Z_SLICE.DI0
Info:  0.0  9.3  Setup dramcore.controller.U$$3.fsm_state_TRELLIS_FF_Q_DI_PFUMX_Z_SLICE.DI0
Info: 2.7 ns logic, 6.6 ns routing