Hello Johan
I've tried your newest images on my Banana PI M5 board.
The EMMC is unformatted, I only use an 16 GB SD-Card.
As you can see at the end of the log, there is an error with
initializing the SD-Card, whatever that means.
Tried with Bookworm and Jammy, and different SD-Cards,
same error. Any idea ?
BL2 Built : 15:21:42, Mar 26 2020. g12a g486bc38 - gongwei.chen@droid11-sz
Board ID = 1
Set cpu clk to 24M
Set clk81 to 24M
Use GP1_pll as DSU clk.
DSU clk: 1200 Mhz
CPU clk: 1200 MHz
Set clk81 to 166.6M
board id: 1
Load FIP HDR DDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
PIEI prepare done
fastboot data verify
result: 255
Cfg max: 12, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
LPDDR4_PHY_V_0_1_21-Built : 15:37:51, Mar 26 2020. g12a gf098346 - gongwei.chen@droid11-sz
ddr clk to 1320MHz
dmc_version 0001
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 12, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1392MHz
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
soc_vref_reg_value 0x 00000015 00000018 00000016 00000015 00000016 00000016 00000016 00000016 00000015 00000015 00000014 00000014 00000014 00000014 00000016 00000014 00000016 00000013 00000016 00000015 00000016
dram_vref_reg_value 0x 00000061
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
non-sec scramble use zero key
ddr scramble enabled
Hello Johan I've tried your newest images on my Banana PI M5 board. The EMMC is unformatted, I only use an 16 GB SD-Card. As you can see at the end of the log, there is an error with initializing the SD-Card, whatever that means. Tried with Bookworm and Jammy, and different SD-Cards, same error. Any idea ?
`bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02
no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180
TE: 368769
BL2 Built : 15:21:42, Mar 26 2020. g12a g486bc38 - gongwei.chen@droid11-sz
Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M board id: 1 Load FIP HDR DDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done PIEI prepare done fastboot data verify result: 255 Cfg max: 12, cur: 1. Board id: 255. Force loop cfg DDR4 probe
LPDDR4_PHY_V_0_1_21-Built : 15:37:51, Mar 26 2020. g12a gf098346 - gongwei.chen@droid11-sz ddr clk to 1320MHz
dmc_version 0001 Check phy result INFO : End of initialization INFO : ERROR : Training has failed! 1D training failed Cfg max: 12, cur: 2. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1392MHz
dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully!
soc_vref_reg_value 0x 00000015 00000018 00000016 00000015 00000016 00000016 00000016 00000016 00000015 00000015 00000014 00000014 00000014 00000014 00000016 00000014 00000016 00000013 00000016 00000015 00000016 dram_vref_reg_value 0x 00000061 2D training succeed auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass
non-sec scramble use zero key ddr scramble enabled
100bdlr_step_size ps== 382 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x000f4600, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 32 0e 00 00 13 32 31 36 58 4b 50 [0.017310 Inits done] secure task start! high task start! low task start! boot bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! ERROR: Error initializing runtime service opteed_fast