The current MIPS CPU selections are "mips32" and "mips64." In this case, several instructions, such as "dext," are not supported.
Therefore, it is necessary to upgrade the CPU in the code to "mips32r6" and "mips64r6" in order to support more instructions.
The current MIPS CPU selections are "mips32" and "mips64." In this case, several instructions, such as "dext," are not supported. Therefore, it is necessary to upgrade the CPU in the code to "mips32r6" and "mips64r6" in order to support more instructions.
Such changes appear in LLVM in a similar form: https://github.com/llvm/llvm-project/blob/78fa41524b6f6e2696ff21ec50e760311ac939a3/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp#L49