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laforest / FPGADesignElements

A self-contained online book containing a library of FPGA design modules and related coding/design guides.
MIT License
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Function body with multiple statements requires SystemVerilog #8

Closed rodrigomelo9 closed 4 years ago

rodrigomelo9 commented 4 years ago

The last complaints of iVerilog (over two files):

Binary_to_Gray_Reflected.v:1: error: Function body with multiple statements requires SystemVerilog.
Gray_to_Binary_Reflected.v:1: error: Function body with multiple statements requires SystemVerilog.
laforest commented 4 years ago

That was a puzzle, and I think you may have indirectly found a Verilator bug! (I specify 1364-2001 as the language standard, but that code passed linting.) Fixed, and I'll raise an issue on the Verilator repo. Thanks!

rodrigomelo9 commented 4 years ago

Take into account that it was a complaint of iverilog (Icarus Verilog), not the Verilator linter.

laforest commented 4 years ago

Yes, I saw. I think Verilator is wrong here, since that code wasn't legal Verilog-2001, but legal Verilog-2005/SystemVerilog. I check my code with Verilator, so it should have caught this.