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mlorenzati / pico-rgb2hdmi

A microprocessed RGB to HDMI Converter with USB capture
MIT License
70 stars 11 forks source link

Multiplex PCM stereo audio to HDMI #3

Open mlorenzati opened 2 years ago

mlorenzati commented 2 years ago

https://www.intel.com/content/www/us/en/docs/programmable/683798/22-1-19-7-0/hdmi-overview.html

mlorenzati commented 2 years ago

https://scdn.rohde-schwarz.com/ur/pws/dl_downloads/dl_application/application_notes/7bm85/7BM85_0E.pdf

rigon commented 7 months ago

Any progress regarding muxing sound? Certainly you are aware, the Pico has 3 built-in ADCs that can be used to capture sound (I don't know it they are any good this). But at least this can be achieved for "free" (apart from developing this feature).

mlorenzati commented 7 months ago

First come first, it's required to merge the work I did in https://github.com/mlorenzati/PicoDVI to switch from DVI to HDMI and use data island with audio on it. This is a bit more cpu intensive so it has to be tested. Regarding capturing analog audio to feed the data island with an ADC, is more related to "available pins" and yes I could use de 12-1 bits resolutions (-1 because of the rp2040 adc bug) but since there are no more pins is easier to add an audio codec (SPI) to do it with less cost.

All this comes again with the expense of cpu time since either way it can be done with dma the bulk transfer, IRQs are still required to prepare each packet transfer and Core 0 and 1 are well used.

rigon commented 7 months ago

Maybe with some compromises in the interface, the three button could be collapsed into one (like short press and long press or double press) or other protocol of communication. This would free up 2 pins.

I see HSYN, VSYNC and GP_CS are connected on the pins of the ADCs, but are they being used with that purpose or as digital inputs? Regarding the DMAs and IRQs, do you mean that they are currently all used?

mlorenzati commented 7 months ago

Regardin the pins, hsync and vsync are edge triggered interrups to detect video sync and CS is the selection of the IC for SPI. DMAs and IRQS are not all used but they do impact into to aspect of the cortex M architecture, DMAs on the free memory bus usage and IRQs on core interruption. With the fast timing of the solution, and interrupt is considered a slow peripheral.