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oddball / ipxact2systemverilog

Translates IPXACT XML to synthesizable VHDL or SystemVerilog
GNU General Public License v2.0
56 stars 19 forks source link

Some register and field naming was not correct. #16

Closed vermaete closed 5 years ago

vermaete commented 5 years ago

Just some put and wast errors. I added the generated and modified output files (e.g. docx, html, ..) because they part of the git repo.