Closed GoogleCodeExporter closed 9 years ago
VPR can accept blackboxes. In blif, this is of the format ".subckt
[name_of_your_custom_block] [pin list]". We provide examples of this in the
vtr_flow/benchmarks folder and the vpr folder.
I don't understand what you mean by integrate VHDL models into xml architecture
files. If you mean how do you specify different hard blocks in the
architecture file, then you should refer to both the VPR manual and to the
examples that we provide in this wiki.
Original comment by JasonKai...@gmail.com
on 25 Jun 2013 at 1:35
Original comment by JasonKai...@gmail.com
on 25 Jun 2013 at 1:35
Original issue reported on code.google.com by
david.dh...@gmail.com
on 25 Jun 2013 at 7:46