RVFI - More accurate csr reporting and correcting register file write reporting when conflict with between apu and lsu

openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

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Closed YoannPruvost closed 1 year ago

YoannPruvost commented 1 year ago

This PR corrects two issues:

Previous PR introduced an issue when capturing register file writes when there is a contention between apu and lsu
Improving csr reporting by catching update only right after id_valid