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openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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What is "MPEC" that is mentioned in the documentation? #917

Closed jstraus59 closed 10 months ago

jstraus59 commented 11 months ago

Looking at commit ad56cba I see the terms MEPC and MPEC used, e.g.

1. if MEPC = "lpend0 - 4" and lpcount0 >= 2 then MPEC should be set to lpstart0; if MEPC = "lpend0 - 4" and lpcount0 >= 1 then it should be decremented by 1.

Is this possibly a type? If not, then what is "MPEC"?

pascalgouedo commented 11 months ago

Argh! Yes this is a typo error. Thanks @jstraus59

jstraus59 commented 10 months ago

Fixed by #927. Closing

Thanks!