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cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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RVFI - Illegal and mstatus
#925
Closed
YoannPruvost
closed
9 months ago
YoannPruvost
commented
9 months ago
This PR fixes two issue:
It checks for apu_rvalid when catching mstatus_fs updates caused by flw
We check for illegal instruction decoded at any states of the core instead of only when a new instruction goes to decode
This PR fixes two issue: