EmptySig subpass Failing for BasicRISC.ISA.sc after adding fma instruction

[rkabrick]

Adding an fma instruction to the BasicRISC.ISA.sc file from tutorials repo results in error executing the optimization passes

Code Added:

# Pipeline Definition
pipeline integer_pipeline()

and instruction definition at EOF:

# fma
def fma:Arith.if( ra rb rt imm )
{
  pipe p1:integer_pipeline{
    rt = ra + rb
  }
  pipe p2:integer_pipeline{
    rt = rt * imm
  }
}

Output:

...
PipeBuilder : Executing subpass: DeadPipeElim
PipeBuilder : Executing subpass: EmptySig
PipeBuilder : EmptySig: signal=MEM_READ from instruction=lb has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_READ from instruction=lbu has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_READ from instruction=ld has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_READ from instruction=lh has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_READ from instruction=lhu has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_READ from instruction=lw has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_READ from instruction=lwu has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=sb has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=sbu has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=sd has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=sh has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=shu has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=sw has no associated pipe stage
PipeBuilder : EmptySig: signal=MEM_WRITE from instruction=swu has no associated pipe stage
ERROR : PipeBuilder : Subpass failed: EmptySig
ERROR : PipeBuilder : Encountered errors executing the the optimization phases
ERROR : Failed to generate signal map
ERROR : Failed to generate signal map

[jleidel]

resubmit to CoreGen