Open BugraEryilmaz opened 3 days ago
Description There are a couple problematic cases for memory decoding. Namely prefetch instruction with register offset and atomic load stores (ldxr)
Expected Behavior Prefetch instruction should be decoded as nop and ldxr register should be decoded with blackbox as it is not implemented.
Actual Behavior They are decoded as normal load store instructions.
Fix: c72dcb5c06b882e04d6c92b133bb4aad586b02ad
Description There are a couple problematic cases for memory decoding. Namely prefetch instruction with register offset and atomic load stores (ldxr)
Expected Behavior Prefetch instruction should be decoded as nop and ldxr register should be decoded with blackbox as it is not implemented.
Actual Behavior They are decoded as normal load store instructions.