pc2 / sus-compiler

A new Hardware Design Language that keeps you in the driver's seat
GNU General Public License v3.0
70 stars 4 forks source link

Implement Multi-Clock #7

Open VonTum opened 3 months ago

VonTum commented 3 months ago

The idea is, to use the domain system to have modules request specific clock constraints.

Something like:

module myMod {
  domain A
  input int a_in

  domain B async to A
  output int b_out
  CrossAsyncDomain cr
  cr.in = a_in
  b_out = cr.out

  domain C sync to A * 3
  output int c_out
  CrossDomain cr_sync
  cr_sync.in = a_in
  c_out = cr_sync.out
}

Roadmap: