Given a declarative language for modeling an SoC, it should also translate into the machine-readable CMSIS SVD format. from which code can already be generated, such as via svd2rust. At the same time, a device tree could be derived from the same source, and then operating systems and applications built on top of everything. SiFive have even created a reverse generator that takes a device tree and outputs SVD, given knowledge on the peripherals and the DT. In a similar fashion, ACPI tables and methods could be created, especially in the form of ACPI lite.
Can we find such transformations, and build a proof of concept? The open specification ISA RISC-V makes a suitable environment for a proof of concept, especially considering that many open SoCs based on it already exist.
Notes
Zephyr generates full code from Device Trees and config
OpenAMP project has the concept of a System Device Tree
orangecms
commented
8 months ago
The following are closely related:
Given a declarative language for modeling an SoC, it should also translate into the machine-readable CMSIS SVD format. from which code can already be generated, such as via svd2rust. At the same time, a device tree could be derived from the same source, and then operating systems and applications built on top of everything. SiFive have even created a reverse generator that takes a device tree and outputs SVD, given knowledge on the peripherals and the DT. In a similar fashion, ACPI tables and methods could be created, especially in the form of ACPI lite.
Can we find such transformations, and build a proof of concept? The open specification ISA RISC-V makes a suitable environment for a proof of concept, especially considering that many open SoCs based on it already exist.
Notes
See also: