A header-only C library to allow access to SPI PSRAM via PIO on the RP2040 microcontroller as used on the Raspberry Pi Pico. Due to the timing requirements of these PSRAM devices, reading data from them at high speed (>84MHz) requires the following clock behavior:
I could not get the hardware SPI interface on the RP2040 to work at high speed with this behavior, so I created a PIO SPI implementation specifically tailored to the behavior of the PSRAM chips and optimized for the highest speed possible:
__force_inline
for the fastest speed possible.Tested PSRAM chips:
These chips have been tested as stable up to an RP2040 clock speed of 280MHz, creating an effecitve SPI clock speed of 140MHz.
An example that tests the PSRAM by writing and reading 8MB of data with 8, 16, 32, and 128 bit access sizes is included in the examples/
directory.
Due to using sideset to drive the CS and SCK signals, those two pins must be on consecutive GPIOs. For example, if CS is on GPIO 0, SCK must be on GPIO 1. MOSI and MISO may be on any pin and do not need to be adjacent.
QSPI support is on the roadmap for the future. If you plan on using QSPI, SIO[0] through SIO[3] must be on consecutive GPIOs.
Clone this repository and copy to a subdirectory or add as a submodule in your project. In your project's CMakeLists.txt
file, add the following:
add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/rp2040-psram rp2040-psram)
And then add rp2040-psram
to your project's target_link_libraries
.
Include psram_spi.h
in your file. See the documentation for this file for how to initialize and use this library.
The following defines MUST be defined:
PSRAM_PIN_CS
- GPIO number of the chip select pinPSRAM_PIN_SCK
- GPIO number of the clock pinPSRAM_PIN_MOSI
- GPIO number of the MOSI pinPSRAM_PIN_MISO
- GPIO number of the MISO pinOptional define:
PSRAM_MUTEX
- Define this to put PSRAM access behind a mutex. This must be used if the PSRAM is to be used by multiple cores.PicoGUS - uses PSRAM to emulate the Gravis Ultrasound's 1MB sample RAM
rp2040-psram is licensed under the MIT license (see LICENSE)