Closed factfinding closed 7 months ago
Oh, that's a surprise! Nice work there.
I had also thought about the la464 dynarec, and end up with a slightly different mapping for the registers:
/*
LA464 GPR mapping
There is no 15 registers free, so split the regs in 2 part
AX..DI : r12-r19
R8..R15: r23-r30
flags in r31
ip in r20
*/
// x86 Register mapping
#define xRAX 12
#define xRCX 13
#define xRDX 14
#define xRBX 15
#define xRSP 16
#define xRBP 17
#define xRSI 18
#define xRDI 19
#define xR8 23
#define xR9 24
#define xR10 25
#define xR11 26
#define xR12 27
#define xR13 28
#define xR14 29
#define xR15 30
#define xFlags 31
#define xRIP 20
// function to move from x86 regs number to LA464 reg number
#define TO_LA464(A) ((A)>7)?((A)+15):((A)+12)
// function to move from LA464 regs number to x86 reg number
#define FROM_LA464(A) ((A)>22)?((A)-15):((A)-12)
// 32bits version
#define wEAX xRAX
#define wECX xRCX
#define wEDX xRDX
#define wEBX xRBX
#define wESP xRSP
#define wEBP xRBP
#define wESI xRSI
#define wEDI xRDI
#define wR8 xR8
#define wR9 xR9
#define wR10 xR10
#define wR11 xR11
#define wR12 xR12
#define wR13 xR13
#define wR14 xR14
#define wR15 xR15
#define wFlags xFlags
// scratch registers
#define x1 5
#define x2 6
#define x3 7
#define x4 8
#define x5 9
#define x6 10
// 32bits version of scratch
#define w1 x1
#define w2 x2
#define w3 x3
#define w4 x4
#define w5 x5
#define w6 x6
// emu is r0
#define xEmu 4
// LA464 RA
#define xRA 1
#define ra xRA
// LA464 SP
#define xSP 3
// xZR regs
#define xZR 0
#define wZR xZR
#define r0 xZR
Do you think you can adapt your PR to that (or maybe you have some objection to this mapping?)
Ok, I will do that.
Happy to see some progress on the Loongarch Dynarec! I have a 3A6000 board and am willing to make some contributions there. Cheers.