riscv-non-isa / riscv-brs

The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.
https://jira.riscv.org/browse/RVG-48
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Machine-level environment is out-of-scope for SBI_060 #180

Closed jhauser-us closed 3 months ago

jhauser-us commented 4 months ago

It's my understanding that the BRS specification is supposed to constrain a supervisor-level RISC-V execution environment, for an OS or hypervisor. Specifics of how machine-level hardware and software might provide this S-level environment should be out-of-scope. (Consider that, for an ISA simulator, there might not even be any M-level environment involved; the S-level environment might be simulated directly, without any M-level RISC-V code.)

Accordingly, SBI_060 can refer to S-level extensions Sscsrind and Ssccfg, but should not mention M-level extensions Smcsrind or Smcdeleg.

andreiw commented 3 months ago

Your understanding is correct, so SBI_060 indeed should not be mentioning any M-level extensions.

andreiw commented 3 months ago

https://github.com/riscv-non-isa/riscv-brs/pull/192