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riscv-non-isa / riscv-iommu

RISC-V IOMMU Specification
https://jira.riscv.org/browse/RVG-55
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Could you please explain why it is not necessary to set V bit to 0 when doing a page size promotion or demotion? #252

Closed baimengwei closed 1 year ago

baimengwei commented 1 year ago

In most cases abort mmu, it seems that the update of the page table adopts the BBM(Break Before Make) mechanism to ensure that other harts get the correct new page table. This rule seems to be applicable to iommu.

the spec has the sentence below:

The only PTE update supported by the IOMMU without first clearing the V bit in the original PTE 
and executing a appropriate IOTINVAL command is to do a page size promotion or demotion.

The scene referred to by the keyword promotion or demotion does not seem to be found in the riscv privileged specification. Does it refer to the translation mode changed from sv39 to sv48 or sv48 to sv39, or something else?

Could you please explain why it is not necessary to set V bit to 0 when doing a page size promotion or demotion?

In most cases, mode switching seems to cause changes in the translation results, and the translation results need to be notified to other harts through the BBM mechanism.

ved-rivos commented 1 year ago

page size promotion or demotion

Page size promotion refers to the process where 512 pages where each page is of size X are merged to create a single mapping with size 512 * X. For example, 512 pages mapped as 4 KiB pages may be merged to create a single 2 MiB page. Page size demotion refers to the opposite process.

baimengwei commented 1 year ago

I see, thank you a lot.