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riscv-non-isa / riscv-iommu

RISC-V IOMMU Specification
https://jira.riscv.org/browse/RVG-55
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implicit access is a read or a write #427

Closed Taurins-peng closed 2 months ago

Taurins-peng commented 2 months ago

Hi Sir, how can I distinguish whether the implicit access is a read or a write? Does this relate to the read or write configuration in my case? image

ved-rivos commented 2 months ago

how can I distinguish whether the implicit access is a read or a write?

A memory access to read or write PTEs are implicit accesses. As part of page table walk there is an implicit access to read the PTE from memory. Such reads are implicit read accesses. For a leaf PTE entry, when hardware A/D updates are supported and enabled, the IOMMU may do a write to the PTE to set the A and/or D bit. Such writes are implicit write accesses.

ved-rivos commented 2 months ago

Hope that helped. Please ask if there are further questions.