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riscv-non-isa / riscv-semihosting

https://lf-riscv.atlassian.net/browse/RVS-2673
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Missing `the` #12

Closed xypron closed 4 months ago

xypron commented 5 months ago

https://github.com/riscv-non-isa/riscv-semihosting/blob/0a1e3af84f77dec0a69a0d6904a9cf59f134265b/src/intro.adoc?plain=1#L11

%s/design of publicly/design of the publicly/

TommyMurphyTM1234 commented 5 months ago

Shouldn't it be "a" rather than "the" as there may be other comparable specifications out there too and the Arm one is just one example?

avpatel commented 4 months ago

Actually, the ARM one is the only semihosting specification available out there. In the future, if some other semihosting spec shows up then we can define a different trap/breakpoint instruction sequence for it.

ilg-ul commented 4 months ago

we can define a different trap/breakpoint instruction sequence for it.

The immediate field in the second dummy shift instruction is wide enough to encode as many IDs as needed (I chose the value 7 for the first one - Arm semihosting - for no particular reason).

However, at least for the foreseeable future, I doubt there will be any.