Floating point loads inconsistent mnemonic

riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.

https://jira.riscv.org/browse/RVG-148

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Floating point loads inconsistent mnemonic #395

Closed ricki-code closed 1 month ago

ricki-code commented 2 months ago

Found in src/insns/load_32bit_fp.adoc

Should these both be frd or rd for consistency?

tomaird commented 2 months ago

There's a few other places too, e.g. c.fld uses frd but c.flw uses rd: