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riscvarchive / riscv-v-spec

Working draft of the proposed RISC-V V vector extension
https://jira.riscv.org/browse/RVG-122
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Compares effectively AND in the mask under a mask-undisturbed policy #900

Closed michael-platzer closed 1 year ago

michael-platzer commented 1 year ago

Section 11.8 of the spec states:

Compares effectively AND in the mask under a mask-undisturbed policy e.g,

# (a < b) && (b < c) in two instructions when mask-undisturbed
vmslt.vv    v0, va, vb        # All body elements written
vmslt.vv    v0, vb, vc, v0.t  # Only update at set mask

Is this an observation that happens to be true when vd == v0 or is this part of the specification and takes precedence over the default handling of inactive elements as specified in section 3.4.3?

As far as I understand, mask destination tail elements are always treated as tail-agnostic but mask destination inactive (i.e., masked-off) elements must be treated according to the current vector mask policy, which means that inactive elements must not be overwritten in the destination vector register if that policy is set to undisturbed.

In the quoted example the destination vector register is the same as the mask source register. Therefore, an AND between the mask source register and the actual result of the compare has the same effect as if the regular mask undisturbed policy had been applied (all elements in v0 that were 0 before the second instruction stay 0). However, if the destination vector register is not v0, then this does no longer apply since there could be any value stored in the inactive elements of the destination vector register.

aswaterman commented 1 year ago

Is this an observation that happens to be true when vd == v0

Yes, hence “effectively”.

michael-platzer commented 1 year ago

The observation is not generally valid, it only applies when the destination vector register is v0. This is confusing and should be clarified IMHO.

aswaterman commented 1 year ago

I don’t find it confusing, but file a PR if you want

nick-knight commented 1 year ago

Could this text simply be deleted? I would support that.

michael-platzer commented 1 year ago

I don’t find it confusing

The statement is wrong. I find incorrect and/or contradictory statements confusing. The least would be to clarify that this only applies if vd == v0.

file a PR if you want

Will do.