A getting started presentation (with examples) about how to use FLOSS for FPGA development.
Creative Commons Attribution 4.0 International
34
stars
3
forks
source link
Try verilator for pure Verilog (without C/C++) #26
Open
rodrigomelo9 opened 12 months ago
verilator --exe --cc dut.sv main.cpp --build
vsverilator --binary dut.sv tb.sv