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rust-embedded / cortex-m

Low level access to Cortex-M processors
Apache License 2.0
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Expose configuration of the SEVONPEND bit within the System Control Register (SCR) #539

Closed calebstewart closed 5 months ago

calebstewart commented 5 months ago

This PR exposes the SEVONPEND bit of the System Control Register (SCR) within the SCB type. This seems inline with the current implementation of the other two defined SCR fields: SLEEPDEEP and SLEEPONEXIT.

As a side-note, I'm relatively new to embedded development in rust, so if this has been omitted for some specific reason I'm unaware of, I'm happy to be corrected. :) That being said, I simply implemented these two new methods in the same way that set/clear_sleepdeep and set/clear_sleeponexit were implemented with the help of section B3.2.7 of the ARMv7-M Architecture Reference Manual.

newAM commented 5 months ago

Re-queued this to allow #542 to go through first which speeds up CI (and the merge queues) considerably.