Open hartytp opened 4 years ago
Personally, I'm happy leaving the bigger FPGA since IIRC it doesn't make a huge difference to the overall cost, and gives us more space to experiment with different designs in the future. However, I'm happy to leave the final call to @jordens if he has stronger opinions.
shall I close it?
Leave the current one. The stft needs a bit more resources.
oops, I posted in the wrong thread.
Re FPGA size: agreed, let's stick with the one we have.
Re checking IQ performance: let's leave this open until someone has checked it, but it shouldn't be a release blocker (right now there isn't a clear pass/fail specification for this anyway)
I've measured the uncompensated Carrier feedthrough (LO leakage) and sideband suppression with the LO at 2.875 GHz. The uncompensated sideband suppression was -38 dBc. The carrier feed-through was -37.5 dBm. Nominally, these are close to typical values. The regarding the carrier feed-through, I'd like to understand #130 before deciding whether this is to spec.
This performance is similar after addressing the LO output amplitude. Playing with the DAC QMC settings I saw siedband powers of -45 dBc. Adjusting the TRF ioff
and qoff
, I could reduce the LO loakage to -68 dBm.
verify that carrier nulling, sideband suppression etc are all roughly within spec