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sinara-hw
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Sayma_AMC
AMC FPGA carrier board with FMC, dual SFP and RTM
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IC18 should probably have thermal vias
#105
marmeladapk
closed
5 years ago
0
Autorouter madness
#104
marmeladapk
closed
5 years ago
13
Decoupling issues
#103
marmeladapk
closed
5 years ago
0
Via not connected to anything
#102
marmeladapk
closed
5 years ago
1
DDR32_VREF is very thin
#101
marmeladapk
closed
5 years ago
1
Weird fill near port 0 SATA
#100
marmeladapk
closed
5 years ago
1
3V3MP power budget
#99
kaolpr
closed
5 years ago
1
Via solder mask tenting
#98
marmeladapk
closed
5 years ago
0
Add CERN OHL mention on silkscreen
#97
marmeladapk
closed
5 years ago
0
Move LD1 to top?
#96
marmeladapk
closed
5 years ago
1
No stackup table in gerber files
#95
marmeladapk
closed
5 years ago
1
No fiducial targets
#94
marmeladapk
closed
5 years ago
2
IC2 (LPC "optional" memory) use case
#93
kaolpr
closed
5 years ago
1
Testpoints
#92
marmeladapk
closed
5 years ago
1
Add length matching rules
#91
marmeladapk
closed
5 years ago
1
LTM4644 review
#90
marmeladapk
closed
5 years ago
1
DNP for SDRAM 4x16 decoupling
#89
kaolpr
closed
5 years ago
0
R509 has undefined value
#88
kaolpr
closed
5 years ago
0
R524 has undefined value
#87
kaolpr
closed
5 years ago
0
R216 has undefined value
#86
kaolpr
closed
5 years ago
0
R389 not needed
#85
kaolpr
closed
5 years ago
1
Inconsistent GT naming
#84
kaolpr
closed
5 years ago
1
Graphics in schematics
#83
kaolpr
closed
5 years ago
2
Helper_CLK variant connections
#82
kaolpr
closed
5 years ago
1
C674 and C675 have no value
#81
kaolpr
closed
5 years ago
0
IC44/Q3 (CDR_CLK_CLEAN2) disconnected completely in default variant
#80
kaolpr
closed
5 years ago
0
DRC rules & DRC (schematics)
#79
marmeladapk
closed
5 years ago
2
Invalid IC44/~CLK0 termination
#78
kaolpr
closed
5 years ago
1
Missing files when cloning project from repository
#77
marmeladapk
closed
5 years ago
1
I2C address map
#76
marmeladapk
closed
5 years ago
1
Sayma AMC panel
#75
gkasprow
closed
5 years ago
0
Disable pin swapping by changing schematic pins in project preferences
#74
marmeladapk
closed
5 years ago
0
CDR_CLK_CLEANx numbering inconsistency
#73
sbourdeauducq
closed
5 years ago
1
option to clock JESD transceivers from HMC7043?
#72
sbourdeauducq
closed
5 years ago
2
32-bit DDR DQS P/N swapped
#71
sbourdeauducq
closed
5 years ago
6
"Si5325" typo
#70
sbourdeauducq
closed
5 years ago
3
DDMTD FF output signal naming
#69
sbourdeauducq
closed
5 years ago
2
Sayma buck converter
#68
gkasprow
closed
5 years ago
4
layout fixes
#67
gkasprow
closed
5 years ago
0
DDMTD_OUT_Helper_CLK_SSTL18
#66
hartytp
closed
5 years ago
1
DFF decoupling
#65
hartytp
closed
5 years ago
2
DNP WR LVPECL bias resistors
#64
hartytp
closed
5 years ago
4
consider making all UFLs MMCX
#63
hartytp
closed
5 years ago
3
schematics cosmetics
#62
hartytp
closed
5 years ago
5
connect DDMTD input to quad 224
#59
sbourdeauducq
closed
5 years ago
1
serwb signals?
#58
sbourdeauducq
closed
5 years ago
10
git tag
#57
sbourdeauducq
closed
5 years ago
2
FMC naming inconsistency
#56
sbourdeauducq
closed
5 years ago
1
R530 Undefined
#55
tprzywoz
closed
5 years ago
1
no "slave" SATA
#54
jordens
closed
5 years ago
1
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