smaeul / sun20i_d1_spl

Mainline-friendly SPL for D1
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[D1s] I want to run the mainline version on D1s, but I get an error during the boot phase! #12

Closed codebug8 closed 1 year ago

codebug8 commented 1 year ago

We want to use D1s to run the Linux mainline version. After a simple reading of the code, we think that the components of D1-H can be used directly on D1s, but after trying to modify the serial port pin IO, start less, and there is a problem in the boot0 stage , is it convenient to give some pointers on what I need to do to make it support D1s?

[35]HELLO! BOOT0 is starting!
[38]BOOT0 commit :
[40]set pll start
[41]periph0 has been enabled
[44]set pll end
[46]board init ok
[47]DRAM only have internal ZQ!!
[50]get_pmu_exist() = -1
[53]ddr_efuse_type: 0x0
[55]type  = 3
[56]tpr13 =
[58]ZQ calibration error, check external 240 ohm resistor.
[64][ERROR DEBUG] auto scan dram rank & width failed !
smaeul commented 1 year ago

D1s contains DDR2, while D1-H boards usually use DDR3. So you will need to update the DRAM parameters in boot0_head.c for DDR2. If you do not have a D1s BSP, you should be able to copy these parameters from an existing D1s boot0 file, since they are at a fixed offset.

codebug8 commented 1 year ago

Thank you, I will try to modify it!

smaeul commented 1 year ago

You might see if the changes from this fork work for you: https://github.com/amessier/sun20i_d1_spl/commits/234b2e905a88f29db91768a25ad1c779594a598e

codebug8 commented 1 year ago

Thank you very much!