Closed YuzukiTsuru closed 1 year ago
arch/arm32/mach-t113s3/reg-dram.h
Test LOG:
[I] AWBoot r25 starting... [D] DRAM BOOT DRIVE INFO: V0.24 [D] DRAM CLK = 792 MHz [D] DRAM Type = 3 (2:DDR2,3:DDR3) [D] DRAMC read ODT off [D] ZQ value = 0x12f [D] DDR efuse: 0xa [D] single rank and full DQ [D] DDR efuse: 0xa [D] rank 0 row = 13 [D] rank 0 bank = 8 [D] rank 0 page size = 2 KB [D] DRAM ODT value: 0x42 [D] DDR efuse: 0xa [D] DRAM: size = 128MB [D] DRAM: simple test OK [T] SMHC: set clock to 400.00KHz
arch/arm32/mach-t113s3/reg-dram.h
for DRAM controller registerTest LOG: