search

taichi-ishitani / tnoc

Network on Chip Implementation written in SytemVerilog
Apache License 2.0
158 stars 44 forks source link

tnoc example testbench #61

Closed liyuanchao888 closed 1 year ago

liyuanchao888 commented 1 year ago

hi taichi-ishitani , I'm appreciate for the Repo of tnoc. I use the vcs could regress all testcase in tnoc and view the waveform in verdi .

My question : use a 3 master to 4 slave axi port innterconnect as DUT , but i don't know how to connect the tnoc axi adapter , fabric and router as the DUT . 

If the tnoc have a example of  connect the 3 parts , it's good for learner. Thank you very much!

BR, Yuanchao

taichi-ishitani commented 1 year ago

Hi @liyuanchao888 ,

https://github.com/taichi-ishitani/tnoc/blob/master/env/axi_adapter/tnoc_axi_adapter_dut_wrapper.sv

This is a wrapper module used for the AXI adapter testbench. It wraps TNoC fabric and AXI master/slave adapters. You can refer this module for your purpose.