programming zedboard leds

[ninode]

Hello,

I want to run a program for LEDs (Have rocketchip blink the LEDs) with ./fesvr-zynq pk program-led (elf), but this requires modifying the block design of zedboard_rocketchip.

How do I let rocketchip handle the blinking of LEDs ? If I have an empty application on SDK with the bit file of rocketchip, then making the boot.bin with this empty application dedicated to blink LEDs, will the rocketchip handle the blinking of the LEDs or the ARM ?

Thank you

[ninode]

@davidbiancolin I'm working with a Zedboard in /fpga-zynq/zedboard and I want to run a LED blinking program ON THE ROCKET CORE and not on the arm core. Could you please provide any pointers ?

[davidbiancolin]

You'll need to include a GPIO in the rocket-chip configuration you're building. In the top-level chisel project you'll need to wire out that signal to a bool you'll need to add the IO of the "Top" module. This will expose an I/O at the top level of the generated verilog. You'll then need to add this I/O to top-level module in rocketchip_wrapper.v, wiring out the signal from the module "top". Finally, you'll need to add a pin constraint to the project to ensure you're driving the right pin.

From the software side, the GPIO will be memory mapped so you should be able to write a small baremetal program to interact with it, which you'll load with PK.

I'm going to suggest you have a look at: https://dev.sifive.com/freedom-soc/evaluate/fpga/

Which is probably better suited for the sorts of tinkering you are trying to do.

• D

[ninode]

In the top-level chisel project you'll need to wire out that signal to a bool you'll need to add the IO of the "Top" module. Are you referring to this file: /fpga-zynq/rocket-chip/chisel3/src/main/resources/top.cpp ? It has timing parameters, where does the boolean go ? (Sorry for beginner questions) After the bool is exposed (say IO), is this the correct wiring (attached) ?

[davidbiancolin]

No, you need a GPIO to rocket-chip, not the vivado system block diagram. You will not have to touch that.

You're going to need to write scala, and mix in one of these into this part of the code. Which means you'll need to add the sifive blocks as a submodule.

This is not going to be a trivial endeavour, so i will reiterate, i highly, highly, highly recommend looking at the SiFive freedom prototyping setup that i linked to previously.

[ninode]

Okay, thank you so much for your help. I sincerely appreciate it.