Open vveralag opened 3 years ago
Created by Gitlab User danielcm: Skip all the logic for station status when automation type is not NGA or Hexa.
This helps Reduce memory footprint.
Commented by Gitlab User danielcm: changed due date to December 31, 2021
Commented by Gitlab User danielcm: added to epic &1
Created by Gitlab User danielcm: Skip all the logic for station status when automation type is not NGA or Hexa.
This helps Reduce memory footprint.