making an issue here because i had an idea and i need a place to write it down before i fall asleep and forget it,
bit 23 of an address on the ARM determines whether it goes to RAM (when 0) or to AICA (when 1).
memory_map does not understand this obvious optimization because it is too high-level and generic. However, there's a bunch of debugging stuff that relies on memory_map because it needs a high-level way to read and write to memory.
The solution is to have two parallel ways to access ARM memory. memory_map will continue to function as it does currently, but there will also be a fast path which bypasses the memory_map and dispatches much quicker.
ADDITIONALLY: we can easily consolidate AICA and AICA's RAM together into a single unit. This will remove a mostly-useless layer of abstraction.
making an issue here because i had an idea and i need a place to write it down before i fall asleep and forget it,
bit 23 of an address on the ARM determines whether it goes to RAM (when 0) or to AICA (when 1).
memory_map does not understand this obvious optimization because it is too high-level and generic. However, there's a bunch of debugging stuff that relies on memory_map because it needs a high-level way to read and write to memory.
The solution is to have two parallel ways to access ARM memory. memory_map will continue to function as it does currently, but there will also be a fast path which bypasses the memory_map and dispatches much quicker.
ADDITIONALLY: we can easily consolidate AICA and AICA's RAM together into a single unit. This will remove a mostly-useless layer of abstraction.