xboot / xfel

Tiny FEL tools for allwinner SOC, support RISC-V D1 chip
MIT License
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SPI nand write not enabling ECC. #28

Closed deividAlfa closed 2 years ago

deividAlfa commented 2 years ago

SPI chip is W25N01GV Data is correctly read and written, but it seems the somehow the ECC (OOB area) is not being generated, breaking the filesystem. I've played with the code, and ECC-E bit (Status-2 register) is actually enabled. In the end I modified it further for my needings, disabling ECC and reading/writing raw 2112-byte pages.

jianjunjiang commented 2 years ago

yes, you are right, ECC is not support