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xn--nding-jua / UltranetReceiver

A FPGA-based receiver for Behringers Ultranet (X32, P16-I, P16-M, etc.)
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Bit timing on UltraLink - doc request #1

Closed mungewell closed 4 months ago

mungewell commented 4 months ago

Very nice work, I've watch video a few times but I am not 100% clear on the timing of the data.

I get that it's 24 bit data at 48KHz, 8 channels per link, 2 links per connector. But you also mention bi-phase encoding which would further double the clock rate, right... what it is the bit time (sub microsecond?)?

Would it be possible to post some scope screen grabs? Or some hand drawn doodles?

The Arduino FPGA board is relatively expensive, do you think it might be possible to use the PIO blocks of Pi Pico to decode bi-phase, sync to it and grab audio data? The PIO blocks can be clocked at CPU freq, which you can PLL up-to ~250MHz.

I have a project which does this for SMPTE timeocode, but that's running a lot slower.

xn--nding-jua commented 4 months ago

Hi, thanks a lot for your message. Well, yes, Ultranet uses an AES3-like connection. AES3 specifies audio-data of up to 192kHz Stereo with 24-bit. But Behringers Ultranet uses only 48kHz - so 1/4, means, we have 3 more channels left in the timing. Hence Ultranet imitates a 192kHz Stereo signal without violating the AES3 specification and uses logic to distribute four 24-bit-values for each left and right to individual storages - so we gain four channels for left and four channels for right. With two datastreams we get the full 16 channels.

I have a bit more information on my website: https://www.pcdimmer.de/index.php/hardware/fpga/ultranet-receiver You can switch the language to english in the upper right corner, if it is not translated automatically.

As I understand the PIO block it is for simple logic circuits to combine signals or to make very fast decisions - or even to implement an UART- or WS2812B-LED-interface. But for the AES3-receiver the demand for logic-elements may be higher than the PIO-block is offering. But I did not spent too much time on this piece of hardware, yet.

mungewell commented 4 months ago

So you do have it well documented already, thank you.

Reading this it seems that the bit clock for Ultralink is 32 8 48000 = 12288000Hz, or 81ns bit time. This is further doubled for the encoding. Regular 2ch AES/EBU would still be 30720000Hz at 48KHz sample rate, which is a bit more manageable for a micro... but still quite fast.

For my own project I used the PIO blocks in parallel; one decoding bi-phase, one looking for sync, and one FIFO'ing data to CPU and then triggering interrupt. But SMPTE is only 80bits per video frame, so no where near the speeds of Ultralink/AES.

For playback frame data was pre-computed by CPU and then shoved into output FIFO, to be played out at the correct speed. CPU just had to keep FIFO full (or rather not empty). Then mulitple PIOs handled play out, and encoding.