yupferris / kaze

An HDL embedded in Rust.
Apache License 2.0
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Best way to support IP blocks? #26

Closed MarkSwanson closed 3 years ago

MarkSwanson commented 3 years ago

What would be the best way to get kaze to integrate with existing IP cores? I'm looking at LVDS (for camera sensors) and HyperRAM on the efinity titanium fpga: https://efinixinc.com/products-efinity.html

The kaze HDL seems really great. I'm curious what a path forward would look like.

Thanks!

yupferris commented 3 years ago

I'm not entirely sure what you mean here - perhapse one of these interpretations:

MarkSwanson commented 3 years ago

Thought experiment:

  1. parse efinity IP core for HyperRAM using https://github.com/dalance/sv-parser
  2. use sv-parser AST to generate kaze modules
  3. use generated kaze modules (and our own Kaze modules) to build an FPGA product on the efinity. Entire product is defined and simulated in Rust/Kaze.

Iirc in one of your videos you talked about not using provided IP cores for memory, and you created your own (Edit: your own kaze modules) from the specs. Wouldn't it be nice if you could have generated the Kaze/Rust modules from the existing IP cores? :-D

MarkSwanson commented 3 years ago

Note: efinity was of course just an example. I'm adding a note here because I'll probably be using different IP cores on a different fpga. I signed up to get access to the efinity IP core verilog and didn't provide my real address / phone number. Because no one uses that info unless they are selling it to marketing companies right? Well, the next step in the process was something like "we're going to verify you". I'm probably in their database as a 'bad person'. heh...

yupferris commented 3 years ago

While that's certainly interesting and should be possible under the right conditions (eg. a single clock domain, the same register reset behavior that kaze expects throughout the design, etc) it's definitely out of scope IMO, but ofc it could totally be built as another project on top of kaze today.