Error "power up timeout" on WT32-ETH01 when using LAN-chip

[dev-endy]

Hi all,

first of all a big thank you for this great project! My 2411 remote died but I setup Tronferno with ESP32 / CC1101 and could continue using my Fernotron motors. Kudos to Zwiebert and all who helped developing that code!

Since I was not satisfied with the WiFi stability of ESP32 I decided to switch to some ESP32 board having ethernet chip integrated. My choice was WT32-ETH01 since I had that board laying around. It has a LAN8720A chip on-board which seems to be supported by Tronferno.

But after flashing and configuring the Tronferno firmware using menutool.sh I got this error message while booting:

I (687) main_task: Started on CPU0 I (691) main_task: Calling app_main()

E (837) eth_phy_802_3: esp_eth_phy_802_3_pwrctl(244): power up timeout E (840) eth_phy_802_3: esp_eth_phy_802_3_basic_phy_init(413): power control failed E (849) lan87xx: lan87xx_init(326): failed to init PHY E (854) esp_eth: esp_eth_driver_install(229): init phy failed I (860) ethernet: driver install failed I (870) storage: Initializing SPIFFS I (950) storage: Partition size: total: 888791, used: 0

From the documentation on tronferno-mcu-bin I know that at least Gateways Rev. E and F from Olimex are working. I compared the schematic from GW Rev. F with the schematic of WT32-ETH01

All the connections between ESP32 GPIOs and LAN8720A PINs seem to be identical. The only difference I could find is that the GW provides the CLK on GPIO17 to the LAN8720A whereas WT32-ETH01 has an external oscillator providing the 50Mhz CLK to both the ESP32 (GPIO0) and the LAN-Chip (PIN "XTAL1") Could that cause the error from above (power up timeout) ?

How big are chances to get Tronferno working on WT32-ETH01 ?

Best Regards, Andy

[zwiebert]

Hello Andy, thanks for the feedback.

The Olimex Gateway board uses GPIO5 to switch on power for PHY, and this GPIO can be configured.

On your board, the power is always on, but that 50 MHz oscillator has an enable input, which is connected to GPIO16. So GPIO16 needs to go high to enable the RMII clock.

Its kind of similar to switching the power on, so you could try to configure GPIO16 as power-on/off GPIO under cogwheel/MCU/Network/LAN in the WebApp.

or via terminal with

config lan-pwr-gpio=16;

It may just work.

GPIO17 will then still output 50MHz, because its configured at compile time to do so. Your original board firmware would want to use GPIO17 for UART2, but Tronferno firmware does not use UART2 so it should not matter.

HTH, Bert

[dev-endy]

Hi Bert, thanks for your fast reply.

I just did what you suggested by setting lan-pwr -gpio to 16. Now I can see that the RJ45 jack on the connected network switch shows a green light telling me that LAN-chip started to work and established a link to the switch.

My Oscilloscope shows 50MHz signal on GPIO17 in any case - just like you said. I can see another 50MHz signal on GPIO0 but only if GPIO16 is HI. You where right - GPIO16 enables the Oscillator.

However, I still see the error message on bootup and after some time the ESP32 starts WiFi in AP mode. So I guess I'm one step further but still have not solved the issue.
Can I provide you with any other helpful debug information?

Regards, Andy

[zwiebert]

Thanks for the feedback.

I think it has something to do with IO0_RMII_EMAC_REF_CLK which is connected to GPIO0. Its the only other thing which is different to the Olimex board. Its drawn in the schematic a bit below the ESP32 rectangle for some reason.

There is a config option RMII-clock-mode in esp-idf menuconfig to chose between internal and external RMII clock. I guess it would need to be configured to external to work with the WT32-ETH1 board. I canot try it here, because I do not have that board, but if I look into some 3rd party source code later, which supports that board, it should be easy to verify.

For now I could configure and compile a firmware that is configured for that board, if you want to test it.

Later I plan to support both boards in the same firmware image. This may take some time, but it should be not too hard to do.

HTH, Bert

[zwiebert]

...there is now a new branch tronferno-mcu-bin/wt32_eth01 which contains the latest beta firmware configured for external RMII clock. Its untested, but the generated configuration now seems to make GPIO0 into an input for the clock signal, which matches the schematic.

[dev-endy]

Hi Bert,

thanks for the quick branch. I flashed the it using menutool.sh but the output is similar to before.

Some conspicuous error that seems to be new now is: E (126637) intr_alloc: No free interrupt inputs for ETH_MAC interrupt (flags 0xE)

Here's the full configuration I did on the serial console including the restart

help;

type 'help <command>;'  or 'help all;'
The commands are: sep, cmd, config, mcu, auto, help, pair, shpref, kvs, 

ready:
config lan-pwr-gpio=16;cli_reply: ok

ready:
config lan-phy=lan8720;cli_reply: ok

ready:
config verbose=5;cli_reply: ok

ready:
config restart=1;I (101316) cli: process_cmdline: config restart=1
cli_replymcu_restart()
: ok

ready:
E (102819) wifi:NAN WiFi stop
I (102820) wifi:flush txq
I (102821) wifi:stop sw txq
I (102821) wifi:lmacets Jun  8 2016 00:22:57

rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:4132
load:0x40078000,len:14880
ho 0 tail 12 room 4
load:0x40080400,len:4
load:0x40080404,len:3420
entry 0x400805b8
I (591) cpu_start: Multicore app
I (599) cpu_start: Pro cpu start user code
I (599) cpu_start: cpu freq: 240000000 Hz
I (599) app_init: Application information:
I (599) app_init: Project name:     tronferno-mcu
I (604) app_init: App version:      1.12.4.13
I (608) app_init: Compile time:     Sep 18 2024 18:24:34
I (613) app_init: ELF file SHA256:  a72ac415f...
I (617) app_init: ESP-IDF:          v5.3.1
I (621) efuse_init: Min chip rev:     v0.0
I (625) efuse_init: Max chip rev:     v3.99 
I (629) efuse_init: Chip rev:         v1.1
I (633) heap_init: Initializing. RAM available for dynamic allocation:
I (639) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (644) heap_init: At 3FFB8F20 len 000270E0 (156 KiB): DRAM
I (649) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (655) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (660) heap_init: At 400991EC len 00006E14 (27 KiB): IRAM
I (667) spi_flash: detected chip: generic
I (669) spi_flash: flash io: dio
I (673) main_task: Started on CPU0
I (676) main_task: Calling app_main()

E (1115) eth_phy_802_3: esp_eth_phy_802_3_pwrctl(250): power up timeout
E (1117) eth_phy_802_3: esp_eth_phy_802_3_basic_phy_init(433): power control failed
E (1125) lan87xx: lan87xx_init(342): failed to init PHY
E (1130) esp_eth: esp_eth_driver_install(229): init phy failed
E (1136) ethernet: driver install failed: ESP_FAIL
I (1139) ethernet: Ethernet removal was successful
E (1144) ethernet: Ethernet setup or start did not succeed
I (1153) storage: Initializing SPIFFS
I (1203) storage: Partition size: total: 888791, used: 0

tf: info: start: tronferno-mcu
tf: info: build-date: Sep 18 2024 18:25:19
tf: hint: type 'help;' to get a command list
I (6149) ethernet: Ethernet removal was successful
I (6150) wifi_ap: create wifi access point
I (6156) wifi:wifi driver task: 3ffc9994, prio:23, stack:6656, core=1
I (6165) wifi:wifi firmware version: ccaebfa
I (6167) wifi:wifi certification version: v7.0
I (6167) wifi:config NVS flash: enabled
I (6168) wifi:config nano formating: disabled
I (6177) wifi:Init data frame dynamic rx buffer num: 32
I (6181) wifi:Init static rx mgmt buffer num: 5
I (6186) wifi:Init management short buffer num: 32
I (6186) wifi:Init dynamic tx buffer num: 32
I (6194) wifi:Init static rx buffer size: 1600
I (6198) wifi:Init static rx buffer num: 10
I (6203) wifi:Init dynamic rx buffer num: 32
I (6204) wifi_init: rx ba win: 6
I (6211) wifi_init: accept mbox: 6
I (6213) wifi_init: tcpip mbox: 32
I (6216) wifi_init: udp mbox: 6
I (6219) wifi_init: tcp mbox: 6
I (6222) wifi_init: tcp tx win: 5760
I (6225) wifi_init: tcp rx win: 5760
I (6227) wifi_init: tcp mss: 1440
I (6230) wifi_init: WiFi IRAM OP enabled
I (6235) wifi_init: WiFi RX IRAM OP enabled
I (6242) phy_init: phy_version 4830,54550f7,Jun 20 2024,14:22:08
I (6307) wifi:mode : softAP (08:f9:e0:a8:56:71)
I (6312) wifi:Total power save buffer number: 16
I (6313) wifi:Init max length of beacon: 752/752
I (6315) wifi:Init max length of beacon: 752/752
I (6321) wifi_ap: wifi_init_softap finished. ap_ssid:tronferno password:tronferno
I (6323) esp_netif_lwip: DHCP server started on interface WIFI_AP_DEF with IP: 192.168.4.1
I (126328) wifi_ap: destroy wifi access point
E (126330) wifi:NAN WiFi stop
I (126332) wifi:flush txq
I (126332) wifi:stop sw txq
I (126334) wifi:lmac stop hw txq
E (126637) intr_alloc: No free interrupt inputs for ETH_MAC interrupt (flags 0xE)
E (126640) esp.emac: esp_eth_mac_new_esp32(685): alloc emac interrupt failed
I (126648) gpio: GPIO[0]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126656) gpio: GPIO[18]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126664) gpio: GPIO[19]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126673) gpio: GPIO[21]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126681) gpio: GPIO[22]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126689) gpio: GPIO[23]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126698) gpio: GPIO[25]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126706) gpio: GPIO[26]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (126714) gpio: GPIO[27]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
E (126723) ethernet: setup MAC failed
I (126728) ethernet: Ethernet removal was successful
E (126731) ethernet: Ethernet setup or start did not succeed

[zwiebert]

Hello Andy, thanks for reporting.

That interrupt error is now fixed in the latest firmware image, but the main problem should still be there and I'm working on it...

[zwiebert]

...when you flash the firmware to the w32-eth01 using an USB to RS232 converter (FTDI), you may have a wire connected to GPIO0. That wire needs to be disconnected after flashing is done, because GPIO0 is then used as input for the 50MHz ethernet reference clock and a connected wire would disturb that clock signal. Maybe thats why it's not working?

[dev-endy]

Ok, I flashed with your latest binaries

0483fbac7b823d9044521f2243f3b150  bootloader.bin
84d04c9d6cc8ef35bf825d51a5277699  ota_data_initial.bin
a1c3463ed7866bcc83d61a1920c67b13  partitions.bin
802eb72ea5827d065836228c3d9cbbee  tronferno-mcu.bin
8693541cbb45174fc2c115fd440e9f92  tronferno-mcu.elf

I configured like always

config verbose=5;cli_reply: ok

ready:
config network=lan lan-phy=lan8720 lan-pwr-gpio=16 http-enable=1;I (55563) cli: process_cmdline: config network=lan lan-phy=lan8720 lan-pwr-gpio=16 http-enable=1
cli_reply: ok

ready:
I (55573) http_server: start server. port=80

Then disconnected programming wires to GPIO0, EN and even RXD (GPIO3). Of course I could not disconnect TXD as we want to see the debug-output. Then I powered down and up to force a reboot.

�����5b������DU*(�ᳯ����5Ag���#�ets Jun  8 2016 00:22:57

rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:4132
load:0x40078000,len:14880
ho 0 tail 12 room 4
load:0x40080400,len:4
load:0x40080404,len:3420
entry 0x400805b8
I (591) cpu_start: Multicore app
I (599) cpu_start: Pro cpu start user code
I (599) cpu_start: cpu freq: 240000000 Hz
I (599) app_init: Application information:
I (599) app_init: Project name:     tronferno-mcu
I (604) app_init: App version:      1.12.4.14
I (608) app_init: Compile time:     Sep 19 2024 13:25:59
I (613) app_init: ELF file SHA256:  b8bad3f74...
I (617) app_init: ESP-IDF:          v5.3.1
I (621) efuse_init: Min chip rev:     v0.0
I (625) efuse_init: Max chip rev:     v3.99 
I (629) efuse_init: Chip rev:         v1.1
I (633) heap_init: Initializing. RAM available for dynamic allocation:
I (639) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (644) heap_init: At 3FFB8F30 len 000270D0 (156 KiB): DRAM
I (649) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (654) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (660) heap_init: At 400991D8 len 00006E28 (27 KiB): IRAM
I (667) spi_flash: detected chip: generic
I (669) spi_flash: flash io: dio
I (673) main_task: Started on CPU0
I (676) main_task: Calling app_main()

I (699) ethernet: Power on PHY using gpio 16
E (1112) eth_phy_802_3: esp_eth_phy_802_3_pwrctl(250): power up timeout
E (1114) eth_phy_802_3: esp_eth_phy_802_3_basic_phy_init(433): power control failed
E (1122) lan87xx: lan87xx_init(342): failed to init PHY
E (1125) esp_eth: esp_eth_driver_install(229): init phy failed
E (1130) ethernet: driver install failed: ESP_FAIL
I (1136) gpio: GPIO[0]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1144) gpio: GPIO[18]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1152) gpio: GPIO[19]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1161) gpio: GPIO[21]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1169) gpio: GPIO[22]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1177) gpio: GPIO[23]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1185) gpio: GPIO[25]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1194) gpio: GPIO[26]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1202) gpio: GPIO[27]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 
I (1210) ethernet: Power off PHY using gpio 16
E (1516) ethernet: Ethernet setup or start did not succeed
I (1520) storage: Initializing SPIFFS
I (1570) storage: Partition size: total: 888791, used: 0

tf: info: start: tronferno-mcu
tf: info: build-date: Sep 19 2024 13:26:42
tf: hint: type 'help;' to get a command list
I (6517) ethernet: Power off PHY using gpio 16
I (6818) wifi_ap: create wifi access point
I (6821) wifi:wifi driver task: 3ffc5b94, prio:23, stack:6656, core=1
I (6828) wifi:wifi firmware version: ccaebfa
I (6829) wifi:wifi certification version: v7.0
I (6832) wifi:config NVS flash: enabled
I (6832) wifi:config nano formating: disabled
I (6840) wifi:Init data frame dynamic rx buffer num: 32
I (6844) wifi:Init static rx mgmt buffer num: 5
I (6849) wifi:Init management short buffer num: 32
I (6850) wifi:Init dynamic tx buffer num: 32
I (6857) wifi:Init static rx buffer size: 1600
I (6861) wifi:Init static rx buffer num: 10
I (6866) wifi:Init dynamic rx buffer num: 32
I (6868) wifi_init: rx ba win: 6
I (6874) wifi_init: accept mbox: 6
I (6876) wifi_init: tcpip mbox: 32
I (6879) wifi_init: udp mbox: 6
I (6882) wifi_init: tcp mbox: 6
I (6885) wifi_init: tcp tx win: 5760
I (6888) wifi_init: tcp rx win: 5760
I (6891) wifi_init: tcp mss: 1440
I (6893) wifi_init: WiFi IRAM OP enabled
I (6899) wifi_init: WiFi RX IRAM OP enabled
I (6905) phy_init: phy_version 4830,54550f7,Jun 20 2024,14:22:08
I (6971) wifi:mode : softAP (08:f9:e0:a8:56:71)
I (6976) wifi:Total power save buffer number: 16
I (6977) wifi:Init max length of beacon: 752/752
I (6979) wifi:Init max length of beacon: 752/752
I (6985) wifi_ap: wifi_init_softap finished. ap_ssid:tronferno password:tronferno
I (6987) esp_netif_lwip: DHCP server started on interface WIFI_AP_DEF with IP: 192.168.4.1
I (11628) wifi:new:<1,0>, old:<1,1>, ap:<1,1>, sta:<255,255>, prof:1, snd_ch_cfg:0x0
I (11632) wifi:station: 9e:5b:31:3f:e7:ba join, AID=1, bgn, 20
I (11671) wifi_ap: station 9e:5b:31:3f:e7:ba join, AID=1
I (11762) wifi:<ba-add>idx:2 (ifx:1, 9e:5b:31:3f:e7:ba), tid:0, ssn:0, winSize:64
I (11798) esp_netif_lwip: DHCP server assigned IP to a client, IP is: 192.168.4.2
I (13060) wifi:<ba-add>idx:3 (ifx:1, 9e:5b:31:3f:e7:ba), tid:7, ssn:1, winSize:64

No interrupt error anymore but the link led on the network-switch stays off most of the time and only randomly flashes every few seconds.

[zwiebert]

Hello Andy, thanks again.

The reason why ethernet is still not working seems to be "phy_config.phy_addr". It needs to be 0 for the Olimex boards I have, but 1 for the wt32-eth01. (When I set it to 1 here, then I get the exact same error messages.) Setting it to -1 for auto detection does not work (no phy found)).

I'll update the wt32_eth01 firmware with the fix for now and if it works add support to the main firmware later.

... you may still need to disconnect that wire at GPIO0.

HTH, Bert

[dev-endy]

Hi Bert,

the new binaries work like a charm now

I (673) main_task: Started on CPU0
I (676) main_task: Calling app_main()

I (701) ethernet: Power on PHY using gpio 16
I (1035) esp_eth.netif.netif_glue: XX:XX:XX:XX:XX:XX
I (1037) esp_eth.netif.netif_glue: ethernet attached to netif
I (2642) ethernet: Ethernet Started
I (2644) ethernet: Ethernet start was successful
I (2645) ethernet: Ethernet Link Up
I (2650) storage: Initializing SPIFFS
I (2702) storage: Partition size: total: 888791, used: 0

tf: info: start: tronferno-mcu
tf: info: build-date: Sep 19 2024 23:06:46
tf: hint: type 'help;' to get a command list
I (6645) esp_netif_handlers: eth ip: 192.168.1.232, mask: 255.255.255.0, gw: 192.168.1.1
I (6649) ethernet: Ethernet Got IP Address
I (6652) ethernet: ~~~~~~~~~~~
I (6655) ethernet: ETHIP:192.168.1.232
I (6658) ethernet: ETHMASK:255.255.255.0
I (6663) ethernet: ETHGW:192.168.1.1
I (6666) ethernet: ~~~~~~~~~~~

I can access tronferno's webserver without WiFi now - very convenient.

Thanks for your efforts to fix this. I hope the changes can be merged into the master branch. ;-) If you need further testing on wt31-eth01 I can support you.

Regards, Andy

[zwiebert]

Hello Andy, thanks a lot for all the reporting.

The wt32-eth0 will work in next beta-branch version 1.12.4.16, if you configure in the terminal config lan-phy=wt32eth0;

Or do the OTA-update and configuration via WIFI in the browser.

For now there are only 3 boards to choose from, but I intend to add more later, which seems to be rather easy to do, and mark them as untested until I can confirm them working.

best regards, Bert

[dev-endy]

One word about GPIO0 and programming. I'm using this circuit: https://github.com/egnor/wt32-eth01?tab=readme-ov-file#programming-with-a-usb-serial-adapter I did some tests e.g. disconnecting the USB plug but leaving GPIO0 connected or disconnected the FT232rl breakout board. However, the circuit did not interfere with the operation of the LAN chip in any case. Of course to be on the safe side GPIO0 should be disconnected during normal operation.