Closed ZoranStojsavljevic closed 4 years ago
Actually, I made mistake in the presentation format. All this now looks as it should be.
printk(KERN_INFO "--- ioremap addr = %lx ---\n", (unsigned long)(base + add));
Implementation issue closed... But there are some other architectural issues I am trying to explain, mainly to myself!
Zoran
Linux kernel memory management Part 2: https://0xax.gitbooks.io/linux-insides/content/MM/linux-mm-2.html
I have created the following github repo: https://github.com/ZoranStojsavljevic/ldd3-skull-revisited/tree/main/skull_revisited
I have problem understanding the following code (in skull.c, rewritten by me):
145 / Use ioremap to get a handle on the ISA region / 146 base = ioremap(ISA_REGION_BEGIN, ISA_REGION_END - ISA_REGION_BEGIN); ...snap... 151 / Probe all the memory hole in STEP steps / 152 for (add = ISA_REGION_BEGIN; add < ISA_REGION_END; add += STEP) {
When I print in STEP (64K) the base +add for these 6 ISA segments, I am getting the following:
This seems to me very odd! I have two questions here:
[1] Should 64bit virtual address look like: 0x000XXXXX_XXXXX000? First 0x000 ==>> 48 addresses + PAE extension (4 bits) Last 0x000 ==>> PT size (page is at 12bits minimum, should it be aligned) to 4K address (0x000)???
[2] Why the 64bit virtual addresses for ISA are random (should VA be adjacent, so these 384K addresses are assigned to base +384K END consecutively/in linear fashion???
What am I doing wrong here???
Could you, please, inspect very quickly the skull.c code?
Thank you in advance, Zoran