vm2: fix prefetch bug - Githubissues

It was reported the opcode prefetch bug is not completely fixed.

If VM2_CORE_FIX_PREFETCH is nonzero the PC2 prefetch bug fix is applied (not completely works, as it was found).

Original 1801BM2 processor contains microcode bug happening at the following conditions:

two operands PDP-11 instruction is being executed
source has addressing method @PC (field value 17 octal)
destination does not involve PC (dst register field !=7)
no extra instruction words are used by destination (no E(Rn),@E(Rn))
Q-bus is slow and opcode prefetch is not completed before microcode starts source field processing and fetching the source data (slow nRPLY/nAR)

1801BM1 / cpu11