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> Icestudio is a visual editor for open FPGA boards that supports many platforms and devices. It allows you to design real hardware with drag and drop interface or Verilog code, and synthesize it into…
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First, this project is amazing! You guys are so cool for making this 😎
My only concern is memory. I run a lot of new software compiled to 68k, and my devtools alone needs 64mb alone. Is there any w…
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Hi everyone!
I am using an xcku035 FPGA, which is not listed in the following link:
https://github.com/Xilinx/Vitis_Embedded_Platform_Source/tree/2024.1/Xilinx_Official_Platforms
Is this going …
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### Describe the bug
Running the example program produces an error for big enough arrays.
Program:
```
public class App
{
public static void parallelInitialization(VectorFloat8 data) {…
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### Describe the bug
Log from post-commit results for https://github.com/intel/llvm/commit/8bf7ae39fbbc2bca93b63c511b3350a0b2da9ab1 (non-functional change).
Full log:
[logs_26294248843 (1).zip…
bader updated
21 hours ago
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Hi, I'm working on the step 4: Compile the overlay project on Vivado 2022.2, ubuntu 20.04. And the kria-vitis-platforms branch is [xlnx_rel_v2022.1].
When it comes to the command `source -notrace .…
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_From @mithro on March 21, 2013 19:44_
Should support USB 2.0 backwards compatible.
Support transfer of raw frames rather than MJPEG stream.
Take a look at https://github.com/mossmann/daisho/tree/…
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First let me thank you for putting together this very nice solution for developing on DE10* platforms.
I have some issues that I'll split into separate github issues to keep track.
The first one…
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From #535 , there seems to be a runtime-HW problem with version 1.4 on AWS.
Is there any plan to upgrade the FPGA Binaries specified for the two platforms?
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Dear author,
Have you tried to deploy Spiking-YOLO on FPGA platforms such as Ultra-96 or other boards like this. If then, how about the accuracy, speed, and energy consumption?