-
Hello,
I would like to know the PIO clock frequency. From what I understand, in low-speed mode the PIO clock divider is set to 8, and in full-speed mode, the divider is set to 1. Given that the sys…
-
As part of a port of the library to IDF 5.3 I have been doing a deep dive into your code and I have a couple of questions about how the I2S clocks are generated (the values you are loading into the I2…
-
I have been wondering if the guzunty would be suitable for creating custom rate audio wordclock generator. Stepped between 10khz to 100khz is what I would like to achieve, but there would be other use…
-
I'm looking inside the C source code, can someone explane the following function? Especially the used values.
```
void picoemp_enable_pwm(float duty_frac) {
if(pwm_enabled) {
return;…
-
Hallo there,
I'll expect the clock div for the `clock_peri` not to be working correctly.
Test case 1:
clock_sys = src
-
Proteus digital input accepts as-is undivided digital signal
![image](https://user-images.githubusercontent.com/48498823/194211927-a8eccf9c-3269-49d0-a04e-241ea1579a76.png)
oscilloscope without …
-
Device is https://www.leobodnar.com/shop/index.php?main_page=product_info&cPath=107&products_id=301
This is the error I get when I attempt to modify anything:
```
(metalloid) % sudo python3 lbg…
-
Including Center-of-Inertia for system frequency, or using Frequency-Divider approaches to obtain frequency for each bus that can be passed directly to inverters (skipping PLL implementation).
-
**Any XIAO SPI to any other XIAO**
Presently data is not moving between the boards.
@LynnL4
Background: The XIAO only has 10 pins most other boards have 20-40 pins. Many large projects need …
-
# Boards
The project supports three boards, MSP430FR5994, MSP430FR5969 and MSP430FR2433. Switch to your board from `CCS.Properties_for_project.General.Project.Device.Variant`.
# Clock
The fun…