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i have MOSFETs with 15.975µm instead of 16:
![no_match](https://github.com/user-attachments/assets/e2784fce-3d84-4951-9af5-8396ae222bdc)
what is the correct way to define tolerances for part-param…
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Good morning, I have followed the tutorial to use these memories, but I have some doubts regarding the actual functioning of the module.
"QUIT_ON_MAGIC_DRC": false,
"QUIT_ON_KLAYOUT_DRC"…
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```
// ==UserScript==
// @name lvs
// @namespace http://tampermonkey.net/
// @version 2024-08-28
// @description hook lvs req
// @author anyone
// @match http://lv…
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Need some help to change a LVS deck to be compatible with hierarchical LVS checking.
In [testcase_deep.zip](https://github.com/user-attachments/files/16457198/testcase_deep.zip) you can find the test…
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http://www.178linux.com/special/n27linuxzy/page/3
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http://blief.blog.51cto.com/6170059/1745134
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plt_scores_pca
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how are `top-level-pins ` made in KLayout?
there are `MetalN.pin`, `TopMetalN.pin` and `GatePoly.pin` layers. but there are also the `*.text` layers.
is a top_lvl_pin for the LVS-script a combinati…
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When implementing LVS hcells, there should be an option to include the .hcells files that come with some libraries (this will need to be added to the tech json schema)
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```
This is the one case where asp=1 should not be there. These should be visually
normed to be comparable. Like a correlation...
```
Original issue reported on code.google.com by `DerekBea...@gmail…