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Trying to keep the module at 6V on OBD asleep (which it fails) I just saw:
Last boot was 10 second(s) ago
Time at boot: 2022-12-05 17:44:00 CET
This is reset #1 since last power cycle
Detecte…
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**Description**
The test case drop_packets/test_drop_counters.py fails due to Value Error in T0 topology with a physical DUT
**Steps to reproduce the issue:**
1. Run the test case in a phys…
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Hi, Extrae developers,
I finallly installed extrae on our cluster systems
however, here comes the problem the user-function can not be checked by paraver as my PC did.
And it is showing this:
…
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Hi, so I'm using the simpleperf stat command on WA, but when I have 7 events, there seems to be an error in the parsing stage. Only occurs when --csv is in the option string.
```
perf:
cleanu…
ghost updated
12 months ago
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#### RISC-V Specification
> 3.1.11: "The minstret CSR counts the number of instructions the hart has retired. The mcycle and minstret registers
have 64-bit precision on all RV32 and RV64 systems.…
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Some configurations result in the CPU attribute not being set on cpu-clock events. We get an explicit failure on calls to 'perf script' when this happens because we ask for the CPU number.
Conside…
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**Type of issue**: feature request
**What is the use case for changing the behavior?** Hardware efficiency
**Impact**: no functional change
**Development Phase**: request
Is there any work…
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```
Steps to reproduce:
1. Create virtual server, choose template, set memory, processor etc.
2. After login panel shows correct values, cpu, memory ...
3. Restart host server
Actual result: Panel s…
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**SailfishOS VERSION** (Settings → About product → Build): 4.2
**HARDWARE** (Settings → About product → Manufacturer & Product name): Xperia 10
**PATCHMANAGER VERSION** (Settings → Patchmanager → [T…
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Similar to how damageboy does in their [blog post for sorting](https://bits.houmus.org/2020-02-02/this-goes-to-eleven-pt5), it would be useful to track branch misses etc with the same tool - [`perf`, …