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gcc for i386 and x86_64 support setting output of inline assembly block based on condition flags.
For example
```
int is_zero;
asm("test %1, %1" : "=@ccz"(is_zero) : "=r"(0));
```
would set i…
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## Motivation
Currently, SPIR-V backend has no way distinguish decorated types (in SPIR-V, decoration instructions modifies types/variables/functions/etc attributes). for example, in the below code…
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Hello!
I'd like to get this working on PPC64. I tried getting something going, but all I get is this:
```
error[E0658]: inline assembly is not stable yet on this architecture
error: `clobber_a…
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| | |
|--------------------|----|
| Bugzilla Link | [PR31721](https://bugs.llvm.org/show_bug.cgi?id=31721) |
| Status | NEW |
| Importance | P normal |
|…
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| | |
|--------------------|----|
| Bugzilla Link | [PR27197](https://bugs.llvm.org/show_bug.cgi?id=27197) |
| Status | NEW |
| Importance | P normal |
|…
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| | |
|--------------------|----|
| Bugzilla Link | [PR8984](https://bugs.llvm.org/show_bug.cgi?id=8984) |
| Status | NEW |
| Importance | P normal |
| R…
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On #2007 I mentioned that I will attempt writing inline assembly to use the tensor cores. Well, I think I got a functional version of hgemm that uses the wmmv instructions!
https://github.com/ihav…
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**Is your feature request related to a problem? Please describe.**
When developing sensitive java applications rises the need to have maximized performance, or perhaps more control over the lower lev…
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This is, admittedly, not a C datatype, but many of the 65xx targets have a decimal mode in hardware, and it would be nice to have type-safe access to it.
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Zig's `translate-c` command/functionality is currently unable to translate inline assembly, resulting in the following message when attempting to do so: `TODO implement translation of stmt class GCCAs…